Material selection for SERDES desgin

Time:2016-01-20  

PCB designers and engineers faced many challenges when they are faced with new technologies. SERDES--high speed serial link transmission line losses, has become a major cause of signal integrity problems. Many forms of reducing such losses, not simply reduce jitter, bit error rate (BER) or Intersymbol interference (ISI). Materials used for manufacturing of multilayer PCB rate of absorption of high frequencies and lower edge, so that the materials selected under more stringent review process.This post will talk about, factors that must be considered in the selection process, provides a number of options for PCB designers. Ideal transmission line model with directional distribution of properties along its length. Physical transmission lines can approximate description of the signal and returns the path portion along the length of the Loop inductance. Equivalent circuit model is a series of simple loop inductance capacitor apart. There is also a small series resistor with inductors and shunt resistor at each end of the capacitor, which we assume is negligible. If I remember in circuit theory 101 says, this looks very similar to a low pass filter, attenuation of high frequencies.Fourier theorem stated that every function, can be completely characterized by amplitude and frequency of the sine and cosine of the sum. Square wave is caused by the harmonics of Fourier series combined. If the waveform, even mark space ratio and even harmonics elimination. In addition, with increasing frequency, amplitude decreases.

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